The MIPS Allegrex CPU is based on MIPS2 with some additional MIPS32r2
instructions and a few novel ones. Support for this CPU was added as of
binutils 2.41.
gcc/ChangeLog:
* config/mips/mips-cpus.def (MIPS_CPU): Added a new CPU.
* config/mips/mips-tables.opt: Regenerated table.
* config/mips/mips.cc: Added cost table for the new CPU.
* config/mips/mips.h (TARGET_ALLEGREX): Defined a new macro.
(TUNE_ALLEGREX): Defined a new macro.
(ISA_HAS_CONDMOVE): Added Allegrex CPU to the list.
(ISA_HAS_LDC1_SDC1): Exclude Allegrex from the list.
(ISA_HAS_COND_TRAP): Exclude Allegrex from the list.
(ISA_HAS_COND_TRAPI): Exclude Allegrex from the list.
(ISA_HAS_CLZ_CLO): Added Allegrex CPU to the list.
(ISA_HAS_ROR): Added Allegrex CPU to the list.
(ISA_HAS_WSBH): Added Allegrex CPU to the list.
(ISA_HAS_SEB_SEH): Added Allegrex CPU to the list.
(ISA_HAS_EXT_INS): Added Allegrex CPU to the list.
(ISA_HAS_XFER_DELAY): Exclude Allegrex from the list.
(ISA_HAS_HILO_INTERLOCKS): Added Allegrex CPU to the list.
* config/mips/mips.md: Added Allegrex CPU as a new processor.
* doc/invoke.texi: Documented Allegrex as a new arch
Signed-off-by: David Guillen Fandos <david@davidgf.net>