[AArch64] Initial commit for Morello architecture

[AArch64] Initial commit for Morello architecture

The Morello architecture implements support for 129 bit capabilities
to replace traditional pointers to reference memory.  A 129 bit
capability has a 64-bit virtual address in its lowest bits and the
next 64 bits have various access control metadata such as bounds
within which the virtual address can be, permissions and other
metadata for protection.  The top 129th bit is stored out of band and
it indicates if the capability is valid.

Capability registers extends the 64-bit register file and are
similarly numberd c0 to c30.  The stack capability register is csp and
it aliases with sp.  One may access the lower 64 bits of the
capability registers by using the 64-bit register names, i.e. x0-x30
and sp.  The Arm Architecture Reference Manual Supplement Morello for
A-profile Architecture has more details on the register layout.

To ensure backward compatibiility, processors implementing the Morello
architecture can run in two states, the standard A64 and a new state
called C64.  In A64 state, base addresses of memory access
instructions are treated as pointers and traditional aarch64
applications should run out of the box in this state.  In C64 state,
base address registers are expected to be valid capabilities.

There are additional load and store instructions that allow using
capabilities as address registers in A64 mode (and 64-bit registers in
C64 mode).  These are called alternate base loads and stores.

The following new -march flags are implemented:

- a64c: This is the base feature flag to implement instruction
  extensions for Morello that are distinct from its base A64 support.
  Address registers are assumed to be 64-bit except for alternate base
  loads and stores; they are assumed to be capability registers.

- morello: This enables instructions that are allowed on the Morello
  architecture in A64.  This includes armv8.2-a, a64c and other
  extensions that are considered part of the Morello architecture.

- c64: This enables instructions that are allowed on the Morello
  architecture in C64 state.  Address registers are assumed to be
  capabilities except for alternate base loads and stores; they are
  assumed to be 64-bit registers.

To assemble code that is intended to run in A64 state on Morello,
build with -march=morello and for C64 state, build with
-march=morello+c64.

This patch implements bare support for registers and the -march flags.

gas/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* config/tc-aarch64.c (AARCH64_REG_TYPES,
	get_reg_expected_msg, aarch64_addr_reg_parse, parse_address,
	reg_names): Add capability registers.
	(parse_operands): Identify capability register based address.
	(aarch64_archs): Add morello.
	(aarch64_features): Add a64c and c64.
	* doc/c-aarch64.texi: Document -march flags.
	* testsuite/gas/aarch64/morello_insn.d: New file
	* testsuite/gas/aarch64/morello_insn-c64.d: New file
	* testsuite/gas/aarch64/morello_insn.s: New file.

include/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_A64C,
	AARCH64_FEATURE_C64): New feature macros.
	(AARCH64_ARCH_MORELLO): New architecture macro.
	(aarch64_operand_class): Add AARCH64_OPND_CLASS_CAP_REG.
	(aarch64_opnd): New capability operands.
	(aarch64_opnd_qualifier): New capability qualifier.
	(aarch64_insn_class): Add a64c instruction class.

opcodes/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* aarch64-opc.c (fields): New capability register fields.
	(aarch64_opnd_qualifiers): Capability operand qualifiers.
	(int_reg): Add capability register bank.
	(get_int_reg_name): Adjust for capability registers.
	(get_cap_reg_name): New function.
	(aarch64_print_operand): Support printing capability operands.
	* aarch64-opc.h (aarch64_field_kind): Add capability operand
	fields.
	(OPD_F_MAYBE_CSP): New macro.
	(operand_maybe_cap_stack_pointer): New function.
	* aarch64-tbl.h (QL2_A64C_CA_CA, A64C, A64C_INSN): New macros.
	(aarch64_feature_a64c): New feature set.