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dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks
authorTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Wed, 1 Oct 2025 21:26:52 +0000 (23:26 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 14 Oct 2025 08:42:51 +0000 (10:42 +0200)
commitc510368bce39cbaf4cb66f4acf788f5efa8692a6
tree9cac9d9f1b0a438567c4956bfd2d25498fdda9e1tree | snapshot
parent3a8660878839faadb4f1a6dd72c3179c1df56787commit | diff
dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks

Add definitions for USB2 PHY core clocks in the R9A09G047 CPG DT
bindings header file.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251001212709.579080-9-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/renesas,r9a09g047-cpg.h diff | blob | blame | history
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