]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new dtsi
authorBeleswar Padhi <b-padhi@ti.com>
Mon, 8 Sep 2025 14:28:16 +0000 (19:58 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 12 Sep 2025 04:15:31 +0000 (09:45 +0530)
commitc5b645dbecd6d0b2689fa44eeefe2a2648172dc7
tree1ba223a9029400b3c98ca7d1d50dc449612c4579
parent897117c6bb4b151bd9326773cd6a5acdad4c47b4
arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new dtsi

The TI K3 J7200 SoCs have multiple programmable remote processors like
R5Fs. The TI SDKs for J7200 SoCs offer sample firmwares which could be
run on these cores to demonstrate an "echo" IPC test. Those firmware
require certain memory carveouts to be reserved from system memory,
timers to be reserved, and certain mailbox configurations for interrupt
based messaging. These configurations could be different for a different
firmware.

While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-25-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi [new file with mode: 0644]