]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask for 8mq vpu
authorMing Qian <ming.qian@oss.nxp.com>
Fri, 5 Dec 2025 01:54:25 +0000 (09:54 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 30 Jan 2026 09:27:40 +0000 (10:27 +0100)
commitcad7003d951e8899db58ee2fef211586af726f09
treebb06246e86cf9552b42b86272a2a9a3bf08fae4c
parent6384f7851838fb00bc71dd51ae7ac16cd494c860
pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask for 8mq vpu

commit 3de49966499634454fd59e0e6fecd50baab7febd upstream.

For i.MX8MQ platform, the ADB in the VPUMIX domain has no separate reset
and clock enable bits, but is ungated and reset together with the VPUs.
So we can't reset G1 or G2 separately, it may led to the system hang.
Remove rst_mask and clk_mask of imx8mq_vpu_blk_ctl_domain_data.
Let imx8mq_vpu_power_notifier() do really vpu reset.

Fixes: 608d7c325e85 ("soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl")
Signed-off-by: Ming Qian <ming.qian@oss.nxp.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pmdomain/imx/imx8m-blk-ctrl.c