RISC-V: Fix xtheadvector ratio attribute. [PR123870]

RISC-V: Fix xtheadvector ratio attribute. [PR123870]

As reported in PR123870 we miscompile an RVV-optimized jpeg-quantsmooth
with xtheadvector.  The core issue is that we forget to emit a vsetvl
before a -fschedule-insn induced spill restore.  Spills are usually
handled by full-register loads and stores but xtheadvector doesn't have
those.  Instead, the regular loads and stores are used which differ from
full-register loads/store in the fact that they don't encode the LMUL
in the instruction directly and thus require a proper SEW and LMUL in
the vtype rather than just the ratio.

This patch makes vlds have an SEW/LMUL demand instead of a "ratio only"
demand for theadvector.

I didn't manage to come up with a simple test case, though.
PR123969 has a test but it won't fail without slight changes to the
16 codebase.  I'm still adding it for documentation and backport
reasons.

Regtested on rv64gcv_zvl512b.

	PR target/123870
	PR target/123969

gcc/ChangeLog:

	* config/riscv/vector.md: Add vlds to "no ratio" for
	theadvector.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/xtheadvector/pr123969.c: New test.

Signed-off-by: Robin Dapp <rdapp@oss.qualcomm.com>