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PCI: dwc: Support 16-lane operation
authorKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Fri, 26 Sep 2025 12:22:45 +0000 (14:22 +0200)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 26 Sep 2025 21:03:02 +0000 (16:03 -0500)
commitcef730075cfe2b2091e3c94471cc0a78405401d5
tree97857721015679f8e682f9b24dbfbcc44f520b5dtree | snapshot
parent8f5ae30d69d7543eee0d70083daf4de8fe15d585commit | diff
PCI: dwc: Support 16-lane operation

Some hosts support 16 lanes of PCIe. Make num-lanes accept that number.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20250926-topic-pcie_16ln-v1-1-c249acc18790@oss.qualcomm.com
drivers/pci/controller/dwc/pcie-designware.c diff | blob | blame | history
drivers/pci/controller/dwc/pcie-designware.h diff | blob | blame | history
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