phy: qualcomm: qmp-combo: Add DP offsets and settings for Glymur platforms

phy: qualcomm: qmp-combo: Add DP offsets and settings for Glymur platforms

Starting with Glymur, the PCIe and DP PHYs qserdes register offsets differ
for the same version number. So in order to be able to differentiate
between them, add these ones with DP prefix.

Add the necessary PHY setting tables for enabling the DP path within the
QMP subsystem.  Introduced some new callbacks for v8 specific sequences,
such as for clock configurations based on the different link speeds.

Wesley Cheng added some updated settings from the hardware programming
guides on existing PHY tables and clock settings.

Co-developed-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20251209-linux-next-12825-v8-9-42133596bda0@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>