[PATCH] RISC-V: optimization on checking certain bits set ((x & mask) == val)

[PATCH] RISC-V: optimization on checking certain bits set ((x & mask) == val)

The patch optimizes code generation for comparisons of the form
X & C1 == C2 by converting them to (X | ~C1) == (C2 | ~C1).
C1 is a constant that requires li and addi to be loaded,
while ~C1 requires a single lui instruction.
As the values of C1 and C2 are not visible within
the equality expression, a plus pattern is matched instead.

      PR target/114087

gcc/ChangeLog:

	* config/riscv/riscv.md (*lui_constraint<ANYI:mode>_and_to_or): New pattern

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/pr114087-1.c: New test.