RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering

RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering

Currently, vfwadd.wv is the pattern with (set (reg) (float_extend:(reg)) which makes
combine pass faile to combine.

change RTL format of vfwadd.wv ------> (set (float_extend:(reg) (reg)) so that combine
PASS can combine.

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
	* config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
	Remove.
	(@pred_single_widen_add<mode>): New pattern.
	(@pred_single_widen_sub<mode>): New pattern.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/widen/widen-1.c: Add floating-point.
	* gcc.target/riscv/rvv/autovec/widen/widen-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen-complicate-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen-complicate-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-1.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-2.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-5.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-6.c: New test.