RISC-V: Make __divdi3 handle div by zero same as hardware.

RISC-V: Make __divdi3 handle div by zero same as hardware.

The ISA manual specifies that divide by zero always returns -1 as the result.
We were failing to do that when the dividend was negative.

Original patch from Virginie Moser.

	libgcc/
	* config/riscv/div.S (__divdi3): For negative arguments, change bgez
	to bgtz.

(cherry picked from commit 4013baf99c38f7bca06a51f8301e8fb195ccfa33)