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(parent: 0b806d6) | patch
drm/i915/fbc: Apply Wa_14025769978
authorVinod Govindapillai <vinod.govindapillai@intel.com>
Thu, 27 Nov 2025 11:53:49 +0000 (13:53 +0200)
committerVinod Govindapillai <vinod.govindapillai@intel.com>
Thu, 4 Dec 2025 12:39:36 +0000 (14:39 +0200)
commitd4ee41f9e19ea89a9cdf32b14be3fe8823f64cc8
tree4c898543d5ddbdc2fe398a7a9b96811e66c0f1cctree
parent0b806d62fd5f59bcf07b971af15bab5bef191279commit | diff
drm/i915/fbc: Apply Wa_14025769978

Disable cache read setting in the cacheability configuration
register as per the wa recommendation

Bspec: 79482, 74722, 68881
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patch.msgid.link/20251127115349.249120-4-vinod.govindapillai@intel.com
drivers/gpu/drm/i915/display/intel_display_wa.c diff | blob | blame | history
drivers/gpu/drm/i915/display/intel_display_wa.h diff | blob | blame | history
drivers/gpu/drm/i915/display/intel_fbc.c diff | blob | blame | history
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