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(parent: 16884ec) | patch
mips: fix endian issues for LWL, LWR, LDR and LDL for mips64
authorPetar Jovanovic <mips32r2@gmail.com>
Fri, 19 Apr 2013 12:35:00 +0000 (12:35 +0000)
committerPetar Jovanovic <mips32r2@gmail.com>
Fri, 19 Apr 2013 12:35:00 +0000 (12:35 +0000)
commitda0d286e34e7db75d7b60df782572cfc5b391f64
tree6cf9af53a7e85f29bd0b48571aac1e4adb46fe75tree
parent16884ec3299c3107f96e7bbde6f9baa0d1f71ab8commit | diff
mips: fix endian issues for LWL, LWR, LDR and LDL for mips64

This change:
- fixes endian issues for unaligned loads for MIPS64,
- (re)moves endian dependencies in guest-to-IR for Iop_ReinterpI32asF32
   and Iop_ReinterpI64asF64 to host-mips-isel,
- adds minor style changes in the area touched by the code.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2709
VEX/priv/guest_mips_toIR.c diff | blob | blame | history
VEX/priv/host_mips_defs.c diff | blob | blame | history
VEX/priv/host_mips_isel.c diff | blob | blame | history
Mirror of https://sourceware.org/git/valgrind.git