]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/amd/display: set MSA MISC1 bit 6 when using VSC SDP for DCE 11.x
authorLeorize <leorize+oss@disroot.org>
Tue, 19 May 2026 03:06:19 +0000 (20:06 -0700)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2026 16:58:21 +0000 (12:58 -0400)
commitda353a6b30086674c77bdbbfd86e9e0c7416ba99
treea8aef90594b62d03f01ce596467cf7cb35ba9c72
parent238baca26a6279e688d1a156bd031390b82eb578
drm/amd/display: set MSA MISC1 bit 6 when using VSC SDP for DCE 11.x

When BT.2020 colorimetry is selected, the driver sends information using
VSC SDP but does not set "ignore MSA colorimetry" bit on older GPUs with
DCE-based IPs. This causes certain sinks to prefer colorimetry
information in DP MSA, resulting in terrible color rendering ("dull"
colors) when HDR is enabled.

This commit wires up the MISC1 bit 6 for GPUs with DCE 11.x based IPs to
correctly configure sinks to ignore colorimetry information in MSA,
resolving the color rendering issue.

Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/4849
Assisted-by: oh-my-pi:GPT-5.5
Signed-off-by: Leorize <leorize+oss@disroot.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 323a09e56c1d549ce47d4f110de77b0051b4a8bf)
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h