misc: amd-sbi: CPUID/MCAMSR protocol for Revision 0x21

misc: amd-sbi: CPUID/MCAMSR protocol for Revision 0x21

- CPUID and MCAMSR protocol for newer platform with revision
  0x21 and later is modified as per two byte register address size.
- Modify the CPUID and MCAMSR protocol to return error, "-EOPNOTSUPP",
  for revision 0x21.
- Next set of patches will add support for CPUID and MCAMSR for Turin and
  later platforms.

Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Link: https://patch.msgid.link/20250915103649.1705078-4-akshay.gupta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>