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author	Julian Seward <jseward@acm.org>
	Sat, 22 Dec 2018 15:11:39 +0000 (16:11 +0100)
committer	Julian Seward <jseward@acm.org>
	Sat, 22 Dec 2018 15:11:39 +0000 (16:11 +0100)
commit	dda0d80f3db1632b204b522a1dbb009490265b0e
tree	6f4a8ae9242b6834ad40fc38aa9b191e5406bb22	tree
parent	901f3d3813c551b18a34ca5a52e3d9393524544c	commit \| diff

amd64 pipeline: improve performance of cvtdq2ps and cvtps2dq (128 and 256 bit versions) ..

.. by giving them their own vector IROps rather than doing each lane individually.

VEX/priv/guest_amd64_toIR.c		diff \| blob \| blame \| history
VEX/priv/host_amd64_defs.c		diff \| blob \| blame \| history
VEX/priv/host_amd64_defs.h		diff \| blob \| blame \| history
VEX/priv/host_amd64_isel.c		diff \| blob \| blame \| history
VEX/priv/ir_defs.c		diff \| blob \| blame \| history
VEX/pub/libvex_ir.h		diff \| blob \| blame \| history
memcheck/mc_translate.c		diff \| blob \| blame \| history
memcheck/tests/vbit-test/irops.c		diff \| blob \| blame \| history

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