]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
riscv: zicfiss / zicfilp enumeration
authorDeepak Gupta <debug@rivosinc.com>
Mon, 26 Jan 2026 04:09:53 +0000 (21:09 -0700)
committerPaul Walmsley <pjw@kernel.org>
Mon, 26 Jan 2026 04:09:53 +0000 (21:09 -0700)
commitdf11708566d7458d1ce11eb28a59ef6a42ee5236
tree5fea8c4b995f5e3b67f5b7eb3cb060381ada6961
parentf94645fc03b864cf0823548c87a455346e87c22c
riscv: zicfiss / zicfilp enumeration

This patch adds support for detecting the RISC-V ISA extensions
Zicfiss and Zicfilp.  Zicfiss and Zicfilp stand for the unprivileged
integer spec extensions for shadow stack and indirect branch tracking,
respectively.

This patch looks for Zicfiss and Zicfilp in the device tree and
accordingly lights up the corresponding bits in the cpu feature
bitmap. Furthermore this patch adds detection utility functions to
return whether shadow stack or landing pads are supported by the cpu.

Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6
Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com>
Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-3-b55691eacf4f@rivosinc.com
[pjw@kernel.org: updated to apply; cleaned up patch description]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/include/asm/cpufeature.h
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpufeature.c