]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
drm/amd/display: update dpp/disp clock from smu clock table
authorPaul Hsieh <Paul.Hsieh@amd.com>
Wed, 23 Jul 2025 03:51:42 +0000 (11:51 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 13 Nov 2025 20:36:57 +0000 (15:36 -0500)
commite3d2a19a2cf09d7fd7306cbcb1e0d600babec65d
treee1b156465f2c1be93b5da70c2376cfe6fb86cffa
parent09250b6e73b88746210e0df16da677bd3316fcbe
drm/amd/display: update dpp/disp clock from smu clock table

[ Upstream commit 2e72fdba8a32ce062a86571edff4592710c26215 ]

[Why]
The reason some high-resolution monitors fail to display properly
is that this platform does not support sufficiently high DPP and
DISP clock frequencies

[How]
Update DISP and DPP clocks from the smu clock table then DML can
filter these mode if not support.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c