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(parent: 1829419) | patch
LoongArch: Align FPU register state to 32 bytes
authorLisa Robinson <lisa@bytefly.space>
Wed, 22 Apr 2026 07:45:11 +0000 (15:45 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Wed, 22 Apr 2026 07:45:11 +0000 (15:45 +0800)
commite3f4591f7920ce169f2f78fa5a89639ada7d7058
treee359772df8ec1ca32c159ccb91a87aaaddcc1d5atree | snapshot
parent1829419bc3b291ad9547abe70053c2620832ac41commit | diff
LoongArch: Align FPU register state to 32 bytes

Move fpr to the beginning of struct loongarch_fpu so it is naturally
aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
switch performance.

Also adjust process.c and fpu.S to work well with the new loongarch_fpu
layout.

Signed-off-by: Lisa Robinson <lisa@bytefly.space>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/include/asm/processor.h diff | blob | blame | history
arch/loongarch/kernel/fpu.S diff | blob | blame | history
arch/loongarch/kernel/process.c diff | blob | blame | history
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