clk: renesas: r8a779f0: Add SDH0 clock

clk: renesas: r8a779f0: Add SDH0 clock

[ Upstream commit 9b5dd1ff705c68549f7a2a91dd8beee14bc543e1 ]

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220711134656.277730-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Stable-dep-of: 1e56ebc9872f ("clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks")
Signed-off-by: Sasha Levin <sashal@kernel.org>