]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
drm/amd/display: Account For OTO Prefetch Bandwidth When Calculating Urgent Bandwidth
authorAustin Zheng <Austin.Zheng@amd.com>
Mon, 13 Jan 2025 19:13:51 +0000 (14:13 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 29 May 2025 09:13:27 +0000 (11:13 +0200)
commite600732296c8a2f0b18f601f1b90a5c4f5d7bb18
tree5334da2e157111a90832b5a8a236e06b7b0daca7
parent7cebaed5cb8683d5f801fb5d989841cbe28b69fd
drm/amd/display: Account For OTO Prefetch Bandwidth When Calculating Urgent Bandwidth

[ Upstream commit 36681f15bb12b5c01df924379cdab9234259825c ]

[Why]
1) The current calculations for OTO prefetch bandwidth do not consider the number of DPP pipes in use.
As a result, OTO prefetch bandwidth may be larger than the vactive bandwidth if multiple DPP pipes are used.
OTO prefetch bandwidth should never exceed the vactive bandwidth.

2) Mode programming may be mismatched with mode support
In cases where mode support has chosen to use the equalized (equ) prefetch schedule,
mode programming may end up using oto prefetch schedule instead.
The bandwidth required to do the oto schedule may end up being higher than the equ schedule.
This can cause the required urgent bandwidth to exceed the available urgent bandwidth.

[How]
Output the oto prefetch bandwidth and incorperate it into the urgent bandwidth calculations
even if the prefetch schedule being used is not the oto schedule.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h