]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
irqchip/ocelot: Fix trigger register address
authorSergey Matsievskiy <matsievskiysv@gmail.com>
Wed, 25 Sep 2024 18:44:15 +0000 (21:44 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 17 Nov 2024 14:06:24 +0000 (15:06 +0100)
commiteb94e4a0db422ef075c1683a8589872f4dd38477
tree79691120ebe8ba4b782f6e67e4f5d6a3c2ca8f1c
parent826cbda558209908f1421bd4c02f1c9715d699c6
irqchip/ocelot: Fix trigger register address

[ Upstream commit 9e9c4666abb5bb444dac37e2d7eb5250c8d52a45 ]

Controllers, supported by this driver, have two sets of registers:

 * (main) interrupt registers control peripheral interrupt sources.

 * device interrupt registers configure per-device (network interface)
   interrupts and act as an extra stage before the main interrupt
   registers.

In the driver unmask code, device trigger registers are used in the mask
calculation of the main interrupt sticky register, mixing two kinds of
registers.

Use the main interrupt trigger register instead.

Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240925184416.54204-2-matsievskiysv@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/irqchip/irq-mscc-ocelot.c