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(parent: 3a460ec) | patch
fpga: zynqpl: Flush dcache only for non-bitstream data
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Tue, 12 Mar 2019 14:50:23 +0000 (20:20 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 13 Mar 2019 14:19:21 +0000 (15:19 +0100)
commitebf24fb076ce89bbdaa6a153df96a5474fec5271
tree1f1e91419f337a946a2de681adb7c479857fbfb7tree
parent3a460ecd96dec200436af18c2c70c4adaddca4d3commit | diff
fpga: zynqpl: Flush dcache only for non-bitstream data

In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/fpga/zynqpl.c diff | blob | blame | history
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