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[PATCH] RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition
authorWang Pengcheng <wangpengcheng.pp@bytedance.com>
Wed, 20 Dec 2023 17:32:59 +0000 (10:32 -0700)
committerJeff Law <jlaw@ventanamicro.com>
Wed, 20 Dec 2023 17:34:13 +0000 (10:34 -0700)
commiteef65d60a8bb2e9328fd9d2b6cd869618be4f08e
treef43a930a363e2580c74abd6e78a2bb1cb751f27atree
parent02c0b49798228d777610f898cd9d63ebec43656dcommit | diff
[PATCH] RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition

The condition is RISCV_FUSE_ZEXTH, which is a mistake.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition.
gcc/config/riscv/riscv.cc diff | blob | blame | history
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