]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
riscv: vector: init vector context with proper vlenb
authorSergey Matyukevich <geomatsi@gmail.com>
Mon, 26 Jan 2026 04:09:56 +0000 (21:09 -0700)
committerPaul Walmsley <pjw@kernel.org>
Mon, 9 Feb 2026 22:27:33 +0000 (15:27 -0700)
commitef3ff40346db8476a9ef7269fc9d1837e7243c40
tree930a1fb5971b288d37fb9be7c3f884f4f17a749f
parent8cdb04bd06c167461b357150b3ca46983eb70dc3
riscv: vector: init vector context with proper vlenb

The vstate in thread_struct is zeroed when the vector context is
initialized. That includes read-only register vlenb, which holds
the vector register length in bytes. Zeroed state persists until
mstatus.VS becomes 'dirty' and a context switch saves the actual
hardware values.

This can expose the zero vlenb value to the user-space in early
debug scenarios, e.g. when ptrace attaches to a traced process
early, before any vector instruction except the first one was
executed.

Fix this by specifying proper vlenb on vector context init.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: Andy Chiu <andybnac@gmail.com>
Tested-by: Andy Chiu <andybnac@gmail.com>
Link: https://patch.msgid.link/20251214163537.1054292-3-geomatsi@gmail.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/kernel/vector.c