]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
authorInochi Amaoto <inochiama@gmail.com>
Tue, 17 Jun 2025 07:01:41 +0000 (15:01 +0800)
committerInochi Amaoto <inochiama@gmail.com>
Wed, 23 Jul 2025 01:55:14 +0000 (09:55 +0800)
commitf5742f67a47cc1bd44368706d41bb2657f8e487d
tree476c814fe37517bd912086ad3c49352b8aa380e1
parent610f943a66bee95101f329d8a8e9a4a82123a66c
riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC

Add reset generator node for all CV18XX series SoC.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Tested-by: Junhui Liu <junhui.liu@pigmoral.tech>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250617070144.1149926-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
arch/riscv/boot/dts/sophgo/cv180x.dtsi
arch/riscv/boot/dts/sophgo/cv18xx-reset.h [new file with mode: 0644]