]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
vfio/pci: Enable iowrite64 and ioread64 for vfio pci
authorRamesh Thomas <ramesh.thomas@intel.com>
Tue, 10 Dec 2024 13:19:37 +0000 (05:19 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 21 Feb 2025 12:49:59 +0000 (13:49 +0100)
commitf601bb7d537ebc6fa995c4279a5f2fd31f51df0f
treec35348a0886e7293b49033fc8782d61ebc72e8b1
parent8b1d868376e8818ca9da7427be5219b17b68c03f
vfio/pci: Enable iowrite64 and ioread64 for vfio pci

[ Upstream commit 2b938e3db335e3670475e31a722c2bee34748c5a ]

Definitions of ioread64 and iowrite64 macros in asm/io.h called by vfio
pci implementations are enclosed inside check for CONFIG_GENERIC_IOMAP.
They don't get defined if CONFIG_GENERIC_IOMAP is defined. Include
linux/io-64-nonatomic-lo-hi.h to define iowrite64 and ioread64 macros
when they are not defined. io-64-nonatomic-lo-hi.h maps the macros to
generic implementation in lib/iomap.c. The generic implementation does
64 bit rw if readq/writeq is defined for the architecture, otherwise it
would do 32 bit back to back rw.

Note that there are two versions of the generic implementation that
differs in the order the 32 bit words are written if 64 bit support is
not present. This is not the little/big endian ordering, which is
handled separately. This patch uses the lo followed by hi word ordering
which is consistent with current back to back implementation in the
vfio/pci code.

Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20241210131938.303500-2-ramesh.thomas@intel.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/vfio/pci/vfio_pci_rdwr.c