realtek: eth: define interrupt status/mask base

realtek: eth: define interrupt status/mask base

Regardless of the number of receive queues (8 or 32) the interrupt
status and mask registers are built up bitwise in the same way:

- 8/32 rx run out interrupts
- 8/32 rx done interrupts
- 2 tx tone interrupts
- 2 tx all done interrupts
- 3 L2 notify interrupts (only RTL839x)

So one can always derive the bit position of those fields by using
the device specific rx_rings configuration setting. To simplify the
code these registers will be handled by central helpers in the future.
In a first step provide a interrupt base register definition that
points to the first interrupt type - aka the rx run out interrupts.

To not overcomplicate things simply reuse the existing DMA_IF_INTR_MSK
and DMA_IF_INTR_STS naming convention. Until all gets fixed the
runout registers on RTL93xx will be accessible by that name.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21893
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>