]> git.ipfire.org Git - thirdparty/gcc.git/commit
[arm] PR target/89400 fix thumb1 unaligned access expansion
authorRichard Earnshaw <rearnsha@arm.com>
Thu, 17 Oct 2019 16:48:39 +0000 (16:48 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Thu, 17 Oct 2019 16:48:39 +0000 (16:48 +0000)
commitf66da75fa4dfcf312a2608d9ad121d17ca36ab8b
treef2fc908e515a61ecb52298387821c1bebce6a3e8
parent41f9f8f42085a334db5bc45e1970dd679353ad5e
[arm]  PR target/89400 fix thumb1 unaligned access expansion

Armv6 has support for unaligned accesses to memory.  However, the
thumb1 code patterns were trying to use the 32-bit code constraints.
One failure mode from this was that the patterns are designed to be
compatible with conditional execution and this was then causing an
assert in the compiler.

The unaligned_loadhis pattern is only used for expanding extv, which
in turn is only enabled for systems supporting thumb2.  Given that
there is no simple expansion for a thumb1 sign-extending load (the
instruction has no immediate offset form and requires two registers in
the address) it seems simpler to just disable this for thumb1.

Fixed thusly:

        Backport from trunk:
2019-05-03  Richard Earnshaw  <rearnsha@arm.com>

PR target/89400
* config/arm/arm.md (unaligned_loadsi): Add variant for thumb1.
Restrict 'all' variant to 32-bit configurations.
(unaligned_loadhiu): Likewise.
(unaligned_storehi): Likewise.
(unaligned_storesi): Likewise.
(unaligned_loadhis): Disable when compiling for thumb1.

From-SVN: r277125
gcc/ChangeLog
gcc/config/arm/arm.md