PFACC/PFNACC 3dNow! instructions got their corresponding SSE alternative
in SSE3, so these can't be implemented with TARGET_MMX_WITH_SSE, which
implies SSE2. These instructions are only generated via builtins, and
since several 3dNow! insns have no corresponding SSE alternative,
we can't avoid MMX registers with 3dNow! builtins anyway.
Add SSE3/AVX alternatives to the insn pattern, so compiler will be able
to use XMM registers when available, but don't prevent MMX registers,
since they are needed when SSE3 is not active.
Add additional generic insn patterns, used by the combiner to
synthesize horizontal V2SFmode add/sub instructions. These patterns
are active for TARGET_MMX_WITH_SSE only, and use only XMM registers.