]> git.ipfire.org Git - thirdparty/u-boot.git/commit
mmc: sdhci-cadence: Set controller and PHY speed modes for SD and eMMC cards
authorTanmay Kathpalia <tanmay.kathpalia@altera.com>
Wed, 3 Dec 2025 12:21:34 +0000 (04:21 -0800)
committerPeng Fan <peng.fan@nxp.com>
Thu, 11 Dec 2025 12:53:51 +0000 (20:53 +0800)
commitfa7e82127fad8b5926b383ec20e06af75a15bd3a
tree3a47373d02eaeb45c56e9ff35b769c3fe723c861
parent1e40e419aeb25f8d9a3f6872b5dcd05a2ed2b06e
mmc: sdhci-cadence: Set controller and PHY speed modes for SD and eMMC cards

Replace the legacy clock frequency-based timing mode selection with
proper MMC timing mode constants.

Changes to sdhci-cadence.c:
- Add sdhci_cdns_get_hrs06_mode() helper function for mode selection
- Replace clock frequency logic with mmc->selected_mode switch statement
- Use proper MMC timing constants (MMC_HS, UHS_SDR104, etc.)
- Add SD card specific handling with standard SDHCI control register setup

Changes to sdhci-cadence6.c:
- Add SD high speed PHY and control configuration arrays
- Update sdhci_cdns6_phy_adj() to use timing modes instead of HRS06 modes
- Support both SD and eMMC timing modes with appropriate PHY settings

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Reviewed-by: Balsundar Ponnusamy <balsundar.ponnusamy@altera.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
drivers/mmc/sdhci-cadence.c
drivers/mmc/sdhci-cadence6.c