rs6000: Add optimizations for _mm_sad_epu8

rs6000: Add optimizations for _mm_sad_epu8

Power9 ISA added `vabsdub` instruction which is realized in the
`vec_absd` instrinsic.

Use `vec_absd` for `_mm_sad_epu8` compatibility intrinsic, when
`_ARCH_PWR9`.

Also, the realization of `vec_sum2s` on little-endian includes
two rotates in order to position the input and output to match
the semantics of `vec_sum2s`:
- Rotate the second input vector left 12 bytes. In the current usage,
  that vector is `{0}`, so this shift is unnecessary, but is currently
  not eliminated under optimization.
- Rotate the vector produced by the `vsum2sws` instruction left 4 bytes.
  The two words within each doubleword of this (rotated) result must then
  be explicitly swapped to match the semantics of `_mm_sad_epu8`,
  effectively reversing this rotate.  So, this rotate (and a susequent
  swap) are unnecessary, but not currently removed under optimization.

Using `__builtin_altivec_vsum2sws` retains both rotates, so is not an
option for removing the rotates.

For little-endian, use the `vsum2sws` instruction directly, and
eliminate the explicit rotate (swap).

2021-11-19  Paul A. Clarke  <pc@us.ibm.com>

gcc
	* config/rs6000/emmintrin.h (_mm_sad_epu8): Use vec_absd when
	_ARCH_PWR9, optimize vec_sum2s when LE.