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(parent: c950e8a) | patch

author	Ulrich Drepper <drepper@gmail.com>
	Fri, 6 Sep 2019 21:49:54 +0000 (23:49 +0200)
committer	Ulrich Drepper <drepper@gmail.com>
	Fri, 6 Sep 2019 21:49:54 +0000 (23:49 +0200)
commit	fcab4f6587528db731da3676decb3bedcf44c08d
tree	1cb27502bfef12cdaeb9f2fbfebf8eb01218f84e	tree \| snapshot
parent	c950e8a995dfee0b6094c9854581b103754c6bb6	commit \| diff

Implement RISC-V disassembler

17 files changed:

backends/riscv_init.c		diff \| blob \| blame \| history
lib/color.c		diff \| blob \| blame \| history
lib/color.h		diff \| blob \| blame \| history
libcpu/Makefile.am		diff \| blob \| blame \| history
libcpu/i386_disasm.c		diff \| blob \| blame \| history
libcpu/riscv_disasm.c	[new file with mode: 0644]	blob
po/de.po		diff \| blob \| blame \| history
po/es.po		diff \| blob \| blame \| history
po/ja.po		diff \| blob \| blame \| history
po/pl.po		diff \| blob \| blame \| history
po/uk.po		diff \| blob \| blame \| history
src/objdump.c		diff \| blob \| blame \| history
tests/Makefile.am		diff \| blob \| blame \| history
tests/run-disasm-riscv64.sh	[new file with mode: 0755]	blob
tests/testfile-riscv64-dis1.expect.bz2	[new file with mode: 0644]	blob
tests/testfile-riscv64-dis1.o.bz2	[new file with mode: 0644]	blob
tests/testfile45.expect.bz2		diff \| blob \| blame \| history

Mirror of https://sourceware.org/git/elfutils.git