]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Support FP roundeven auto-vectorization
authorPan Li <pan2.li@intel.com>
Wed, 27 Sep 2023 08:13:43 +0000 (16:13 +0800)
committerPan Li <pan2.li@intel.com>
Wed, 27 Sep 2023 08:28:48 +0000 (16:28 +0800)
commitfcbbf158ee90400877f81185bb40b5870dca1558
tree46cd39c9f093e5c8c801e43c3bce4f8699adf7b6
parent073849da3dfd5cabbfd4492a40a17b207b4a7630
RISC-V: Support FP roundeven auto-vectorization

This patch would like to support auto-vectorization for the
roundeven API in math.h. It depends on the -ffast-math option.

When we would like to call roundeven like v2 = roundeven (v1), we will
convert it into below insns (reference the implementation of llvm).

* vfcvt.x.f v3, v1, RNE
* vfcvt.f.x v2, v3

However, the floating point value may not need the cvt as above if
its mantissa is zero. For example single precision floating point below.

  +-----------+---------------+-----------------+
  | raw float | binary layout | after roundeven |
  +-----------+---------------+-----------------+
  | 8388607.5 | 0x4affffff    | 8388608.0       |
  | 8388608.0 | 0x4b000000    | 8388608.0       |
  | 8388609.0 | 0x4b000001    | 8388609.0       |
  +-----------+---------------+-----------------+

All single floating point glte 8388608.0 will have all zero mantisaa.
We leverage vmflt and mask to filter them out in vector and only do the
cvt on mask.

Befor this patch:
math-roundeven-1.c:21:1: missed: couldn't vectorize loop
  ...
.L3:
  flw     fa0,0(s0)
  addi    s0,s0,4
  addi    s1,s1,4
  call    roundeven
  fsw     fa0,-4(s1)
  bne     s0,s2,.L3

After this patch:
  ...
  fsrmi       0   // Rounding to nearest, ties to even
.L4:
  vfabs.v     v1,v2
  vmflt.vf    v0,v1,fa5
  vfcvt.x.f.v v3,v2,v0.t
  vfcvt.f.x.v v1,v3,v0.t
  vfsgnj.vv   v1,v1,v2
  bne         .L4
.L14:
  fsrm        a6
  ret

Please note VLS mode is also involved in this patch and covered by the
test cases.  We will add more run test with zfa support later.

gcc/ChangeLog:

* config/riscv/autovec.md (roundeven<mode>2): New pattern.
* config/riscv/riscv-protos.h (enum insn_flags): New enum type.
(enum insn_type): Ditto.
(expand_vec_roundeven): New func decl.
* config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-roundeven-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-2.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/config/riscv/autovec.md
gcc/config/riscv/riscv-protos.h
gcc/config/riscv/riscv-v.cc
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-roundeven-0.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-roundeven-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-roundeven-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-roundeven-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c [new file with mode: 0644]