RISC-V: Added zvfh support for zfa extensions.

RISC-V: Added zvfh support for zfa extensions.

This is a follow-up for the zfa extension, added according to the recommendations
for zvfh and patch of Tsukasa OI <research_trasio@irq.a4lg.com>. At the same time,
zfa-fli-5.c of which is also based on the patch.

Ref:
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627284.html
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628492.html

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
	zvfh can generate zfa extended instruction fli.h, just like zfh.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/zfa-fli-7.c: Change fa0 to fa\[0-9\] to avoid
	assigning register numbers that are non-zero.
	* gcc.target/riscv/zfa-fli-8.c: Ditto.
	* gcc.target/riscv/zfa-fli-5.c: New test.