]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
arm64: dts: imx8mm: Drop CSI1 PHY reference clock configuration
authorFabio Estevam <festevam@denx.de>
Tue, 25 Jul 2023 23:26:28 +0000 (20:26 -0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 23 Aug 2023 15:32:50 +0000 (17:32 +0200)
commitfe4d623f2e1bee49459c56bb1f8a9f65fb727cf2
treea491b9ea85cfc4fdb825f9b8c020f61f7ed5ad10
parenta1aab731f0c8307857bd6b6480b6ab19472c6880
arm64: dts: imx8mm: Drop CSI1 PHY reference clock configuration

[ Upstream commit f02b53375e8f14b4c27a14f6e4fb6e89914fdc29 ]

The CSI1 PHY reference clock is limited to 125 MHz according to:
i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020
Table 5-1. Clock Root Table (continued) / page 307
Slice Index n = 123 .

Currently the IMX8MM_CLK_CSI1_PHY_REF clock is configured to be
fed directly from 1 GHz PLL2 , which overclocks them. Instead, drop
the configuration altogether, which defaults the clock to 24 MHz REF
clock input, which for the PHY reference clock is just fine.

Based on a patch from Marek Vasut for the imx8mn.

Fixes: e523b7c54c05 ("arm64: dts: imx8mm: Add CSI nodes")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm.dtsi