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(parent: df2762a) | patch
RISC-V: Fix unreachable test code for init repeat sequence.
authorPan Li <pan2.li@intel.com>
Wed, 31 May 2023 00:24:39 +0000 (08:24 +0800)
committerPan Li <pan2.li@intel.com>
Wed, 31 May 2023 01:01:37 +0000 (09:01 +0800)
commitfefa7db2c31fee449dd46dd6ed7f5a39fa884038
treebe8cd9ad4022c79971d21d42f2411d32ed52b257tree
parentdf2762ac6ebe9d1feeece8c829bc7039de25da57commit | diff
RISC-V: Fix unreachable test code for init repeat sequence.

This patch fix one unreachable test code, which is for debugging purpose
without cleanup before commit.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-run-1.c:
Remove debug code.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-run-1.c diff | blob | blame | history
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