RISC-V: Nan-box the result of movhf on soft-fp16

RISC-V: Nan-box the result of movhf on soft-fp16

According to spec, fmv.h checks if the input operands are correctly
NaN-boxed. If not, the input value is treated as an n-bit canonical NaN.
This patch fixs the issue that operands returned by soft-fp16 libgcc
(i.e., __truncdfhf2) was not correctly NaN-boxed.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_legitimize_move): Expand movfh
	with Nan-boxing value.
	* config/riscv/riscv.md (*movhf_softfloat_unspec): New pattern.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/_Float16-nanboxing.c: New test.

Co-authored-by: Patrick Lin <patrick@andestech.com>
Co-authored-by: Rufus Chen <rufus@andestech.com>
Co-authored-by: Monk Chiang <monk.chiang@sifive.com>