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qualcommax: ipq50xx: spi-qpic-snand: default to 4-bit ECC 18795/head
authorRobert Marko <robimarko@gmail.com>
Thu, 15 May 2025 21:15:28 +0000 (23:15 +0200)
committerRobert Marko <robimarko@gmail.com>
Fri, 16 May 2025 15:57:40 +0000 (17:57 +0200)
commitfb90296c322ac7231091782cf92db8868ccfeb7a
tree1f651f3443f965107e4221bb7178a973c4bca3a5tree
parent91e9a1d2213390ff8f8023688ad491ad237925eccommit | diff
qualcommax: ipq50xx: spi-qpic-snand: default to 4-bit ECC

There are NAND IC-s that define 1-bit ECC as the minimal strength,
however that is unsupported by QPIC-SNAND as it only supports 4 or 8 bit
ECC.

Since most of these chips also support 4-bit ECC just fine, instead of
erroring out if 1-bit ECC is requested lets instead default to 4-bit ECC.

Fixes: 01b72ce61e8f ("qualcommax: ipq50xx: remove ECC user config from board files")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18795
Signed-off-by: Robert Marko <robimarko@gmail.com>
target/linux/qualcommax/patches-6.12/0401-spi-spi-qpic-snand-default-to-4-bit-ECC.patch [new file with mode: 0644] blob
target/linux/qualcommax/patches-6.6/0401-spi-spi-qpic-snand-default-to-4-bit-ECC.patch [new file with mode: 0644] blob
Mirror of https://github.com/openwrt/openwrt.git