arm64: dts: imx8mp: Update Data Modul i.MX8M Plus eDM SBC DT to rev.903

Update the DT to match newest Data Modul i.MX8M Plus eDM SBC rev.903
board which implements significant changes. Keep some of the rev.900
and rev.902 nodes in the DT so that a DTO can be used to support old
rev.900 and rev.902 boards easily.

The changes from rev.900 to rev.902 are:
- Both ethernet PHYs replaced from AR8031 to BCM54213PE
- Both ethernet PHYs MDIO address changed
- PCIe WiFi now comes with dedicated regulator
- I2C TPM chip address
- Additional GPIO expander for LVDS panel control added
- Current EEPROM I2C address changed
- Another optional EEPROM added onto another I2C bus

The changes from rev.902 to rev.903 are:
- Additional GPIO expander for WiFi and LVDS panel control added
- Multiple GPIOs are reassigned

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
index 16078ff60ef08bcf7f2792ed2d1456560fe47601..7e46537a22a01d6e66305394edcddd73fdf660da 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
@@ -93,6 +93,17 @@
                status = "disabled";
        };
 
+       reg_pcie0: regulator-pcie {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_wifi>;
+               regulator-name = "WIFI_BT_RST#";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
@@ -190,7 +201,7 @@
 &eqos {        /* First ethernet */
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_eqos>;
-       phy-handle = <&phy_eqos>;
+       phy-handle = <&phy_eqos_bcm>;
        phy-mode = "rgmii-id";
        status = "okay";
 
@@ -200,7 +211,7 @@
                #size-cells = <0>;
 
                /* Atheros AR8031 PHY */
-               phy_eqos: ethernet-phy@0 {
+               phy_eqos_ath: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
                        /*
@@ -213,6 +224,7 @@
                        reset-deassert-us = <10000>;
                        qca,keep-pll-enabled;
                        vddio-supply = <&vddio_eqos>;
+                       status = "disabled";
 
                        vddio_eqos: vddio-regulator {
                                regulator-name = "VDDIO_EQOS";
@@ -224,13 +236,27 @@
                                regulator-name = "VDDH_EQOS";
                        };
                };
+
+               /* Broadcom BCM54213PE PHY */
+               phy_eqos_bcm: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <1>;
+                       /*
+                        * Dedicated ENET_INT# and ENET_WOL# signals are
+                        * unused, the PHY does not provide cable detect
+                        * interrupt.
+                        */
+                       reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <10000>;
+                       reset-deassert-us = <10000>;
+               };
        };
 };
 
 &fec { /* Second ethernet */
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_fec>;
-       phy-handle = <&phy_fec>;
+       phy-handle = <&phy_fec_bcm>;
        phy-mode = "rgmii-id";
        fsl,magic-packet;
        status = "okay";
@@ -240,7 +266,7 @@
                #size-cells = <0>;
 
                /* Atheros AR8031 PHY */
-               phy_fec: ethernet-phy@0 {
+               phy_fec_ath: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
                        /*
@@ -253,6 +279,7 @@
                        reset-deassert-us = <10000>;
                        qca,keep-pll-enabled;
                        vddio-supply = <&vddio_fec>;
+                       status = "disabled";
 
                        vddio_fec: vddio-regulator {
                                regulator-name = "VDDIO_FEC";
@@ -264,6 +291,20 @@
                                regulator-name = "VDDH_FEC";
                        };
                };
+
+               /* Broadcom BCM54213PE PHY */
+               phy_fec_bcm: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <1>;
+                       /*
+                        * Dedicated ENET_INT# and ENET_WOL# signals are
+                        * unused, the PHY does not provide cable detect
+                        * interrupt.
+                        */
+                       reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <10000>;
+                       reset-deassert-us = <10000>;
+               };
        };
 };
 
@@ -378,13 +419,26 @@
                self-powered;
        };
 
-       eeprom: eeprom@50 {
+       tpm: tpm@2e {
+               compatible = "st,st33tphf2ei2c", "tcg,tpm-tis-i2c";
+               reg = <0x2e>;
+       };
+
+       eeprom900: eeprom@50 {  /* board rev.900 */
                compatible = "atmel,24c32";
                reg = <0x50>;
                pagesize = <32>;
+               status = "disabled";
+       };
+
+       eeprom902: eeprom@51 {  /* board rev.902 */
+               compatible = "atmel,24c32";
+               reg = <0x51>;
+               pagesize = <32>;
        };
 
        rtc: rtc@68 {
+               #clock-cells = <1>;
                compatible = "st,m41t62";
                reg = <0x68>;
                pinctrl-names = "default";
@@ -408,6 +462,46 @@
        scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
+
+       gpiolvds: io-expander@20 {
+               compatible = "nxp,pca9554";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-line-names =
+                       "BL_ENABLE_V", "SEL_BL_12V",
+                       "SEL_PANEL_5V", "SEL_PANEL_12V",
+                       "SEL_BL_PWM", "SEL_BL_EN",
+                       "REVERSE_SCAN_PANEL", "GND_REV903";
+       };
+
+       gpiowifi: io-expander@21 {
+               compatible = "nxp,pca9554";
+               reg = <0x21>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-line-names =
+                       "BL_LVDS_ENABLE_3V3", "BL_LVDS_PWM_3V3",
+                       "M2_BT_WAKE_3V3#", "M2_W_DISABLE2_3V3#",
+                       "TFT_PANEL_ENABLE_3V3", "TPM_RESET_3V3#",
+                       "CSI2_PD_3V3", "CSI2_RESET_3V3#";
+
+               /* BL_LVDS_PWM_3V3 is patch-wired to BL_PWM_3V3 on rev.903 */
+               pwm-input-hog {
+                       gpio-hog;
+                       gpios = <1 0>;
+                       input;
+                       line-name = "BL_LVDS_PWM_3V3_HOG";
+               };
+       };
+
+       eepromlvds: eeprom@51 {
+               compatible = "atmel,24c32";
+               reg = <0x51>;
+               pagesize = <32>;
+               /* Optional EEPROM, disabled by default. */
+               status = "disabled";
+       };
 };
 
 &i2c3 {
@@ -521,6 +615,7 @@
        pinctrl-0 = <&pinctrl_pcie0>;
        fsl,max-link-speed = <3>;
        reset-gpio = <&gpio1 5 GPIO_ACTIVE_LOW>;
+       vpcie-supply = <&reg_pcie0>;
        status = "okay";
 };
 
@@ -598,7 +693,17 @@
 &uart4 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart4>;
-       status = "disabled";
+       uart-has-rtscts;
+       status = "okay";
+
+       bluetooth {
+               compatible = "infineon,cyw55572-bt";
+               brcm,requires-autobaud-mode;
+               clocks = <&rtc 0>;
+               clock-names = "txco";
+               max-speed = <921600>;
+               shutdown-gpios = <&gpiowifi 3 GPIO_ACTIVE_HIGH>;
+       };
 };
 
 &usb3_phy0 {
@@ -686,8 +791,6 @@
                        MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3       0x91
                        /* ENET_RST# */
                        MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15             0x6
-                       /* ENET_INT# */
-                       MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11             0x40000090
                >;
        };
 
@@ -709,8 +812,6 @@
                        MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC         0x1f
                        /* ENET2_RST# */
                        MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09              0x6
-                       /* ENET2_INT# */
-                       MX8MP_IOMUXC_SD1_DATA0__GPIO2_IO02              0x40000090
                >;
        };
 
@@ -754,10 +855,6 @@
 
                        /* PG_V_IN_VAR# */
                        MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01             0x40000000
-                       /* CSI2_PD_1V8 */
-                       MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08            0x0
-                       /* CSI2_RESET_1V8# */
-                       MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09            0x0
 
                        /* DIS_USB_DN1 */
                        MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21              0x0
@@ -771,8 +868,14 @@
                        /* GRAPHICS_PRSNT_1V8# */
                        MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18              0x40000000
 
+                       /* TOUCH_RESET_3V3# */
+                       MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00             0x2
+                       /* TOUCH_INT# */
+                       MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10             0x40000140
                        /* CLK_CCM_CLKO1_3V3 */
                        MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1              0x10
+                       /* ENET_INT# (rev.900,901) or M2_WDIS_BTIRQ_3V3# (rev.903) */
+                       MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11             0x40000092
                >;
        };
 
@@ -875,12 +978,10 @@
                fsl,pins = <
                        /* M2_PCIE_RST# */
                        MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05             0x2
-                       /* M2_W_DISABLE1_1V8# */
+                       /* M2_PCIE_WAKE_1V8# */
                        MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23              0x2
-                       /* M2_W_DISABLE2_1V8# */
-                       MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24              0x2
-                       /* CLK_M2_32K768 */
-                       MX8MP_IOMUXC_GPIO1_IO00__CCM_EXT_CLK1           0x14
+                       /* M2_UART_WAKE_1V8# */
+                       MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24              0x40000002
                        /* M2_PCIE_WAKE# */
                        MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06             0x40000140
                        /* M2_PCIE_CLKREQ# */
@@ -974,6 +1075,8 @@
                fsl,pins = <
                        MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX            0x49
                        MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX            0x49
+                       MX8MP_IOMUXC_NAND_DATA02__UART4_DCE_CTS         0x149
+                       MX8MP_IOMUXC_NAND_DATA03__UART4_DCE_RTS         0x149
                >;
        };
 
@@ -1100,4 +1203,11 @@
                        MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08              0x26
                >;
        };
+
+       pinctrl_wifi: wifi-grp {
+               fsl,pins = <
+                       /* WIFI_BT_RST_3V3# */
+                       MX8MP_IOMUXC_SD1_DATA0__GPIO2_IO02              0x40000090
+               >;
+       };
 };