]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Add UTCL2 Retry fault interrupt for GFX 12.1
authorMukul Joshi <mukul.joshi@amd.com>
Thu, 17 Apr 2025 02:46:19 +0000 (22:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 10 Dec 2025 22:38:30 +0000 (17:38 -0500)
Add the UTCL2 retry fault interrupt for both GCVM and MMVM for GFX 12.1.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
drivers/gpu/drm/amd/include/ivsrcid/vmc/irqsrcs_vmc_1_0.h

index efc519112ac450c4e4e6fd869f62cd9fba37f3a6..1b1e2ddbc600aaa2083ce84e8d584be008b18ec5 100644 (file)
@@ -656,6 +656,7 @@ static int gmc_v12_0_early_init(struct amdgpu_ip_block *ip_block)
        adev->gmc.private_aperture_start = 0x1000000000000000ULL;
        adev->gmc.private_aperture_end =
                adev->gmc.private_aperture_start + (4ULL << 30) - 1;
+       adev->gmc.noretry_flags = AMDGPU_VM_NORETRY_FLAGS_TF;
 
        return 0;
 }
@@ -822,14 +823,28 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
-       if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0))
+       if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0)) {
                r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_UTCL2,
                                      UTCL2_1_0__SRCID__FAULT,
                                      &adev->gmc.vm_fault);
-       else
+               if (r)
+                       return r;
+               /* Add GCVM UTCL2 Retry fault */
+               r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_UTCL2,
+                                     UTCL2_1_0__SRCID__RETRY,
+                                     &adev->gmc.vm_fault);
+               if (r)
+                       return r;
+
+               /* Add MMVM UTCL2 Retry fault */
+               r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_VMC,
+                                     VMC_1_0__SRCID__VM_RETRY,
+                                     &adev->gmc.vm_fault);
+       } else {
                r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX,
                                      UTCL2_1_0__SRCID__FAULT,
                                      &adev->gmc.vm_fault);
+       }
        if (r)
                return r;
 
index d130936c99890cb802879e1e930dbfd1e9d153ad..22075805e95c4b7030896dc743c69ae19e790fb9 100644 (file)
 
 
 #define VMC_1_0__SRCID__VM_FAULT                            0
+#define VMC_1_0__SRCID__VM_RETRY                            1
 #define VMC_1_0__SRCID__VM_CONTEXT0_ALL                     256
 #define VMC_1_0__SRCID__VM_CONTEXT1_ALL                     257
 
 #define UTCL2_1_0__SRCID__FAULT                             0       /* UTC L2 has encountered a fault or retry scenario */
+#define UTCL2_1_0__SRCID__RETRY                             1       /* UTC L2 has encountered a retry scenario (GFX12.1) */
 
 
 #endif /* __IRQSRCS_VMC_1_0_H__ */