]> git.ipfire.org Git - thirdparty/openembedded/openembedded-core.git/commitdiff
ffmpeg: Disable asm and rvv on riscv32
authorKhem Raj <raj.khem@gmail.com>
Sat, 8 Apr 2023 20:18:59 +0000 (13:18 -0700)
committerRichard Purdie <richard.purdie@linuxfoundation.org>
Thu, 13 Apr 2023 10:55:40 +0000 (11:55 +0100)
ffmpeg 6.0 has added assembly routines which uses rv64i ISA
unconditionally, ideally it should check for ISA before using those
instructions.

Fixes errors like
<instantiation>:1:1: error: instruction requires the following: RV64I Base Instruction Set
ld t0, (a1)
^
src/libavcodec/riscv/pixblockdsp_rvi.S:24:1: note: while in macro instantiation
.irp row, 0, 1, 2, 3, 4, 5, 6, 7
^
<instantiation>:3:9: error: instruction requires the following: RV64I Base Instruction Set
        sd zero, ((0 * 16) + 0)(a0)
        ^

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
meta/recipes-multimedia/ffmpeg/ffmpeg_6.0.bb

index e4a4a0effa19a4f28e3359c54212ca40d5d45fa6..7db43a82816c7f9064af78dcefcf97991eeb27dd 100644 (file)
@@ -126,7 +126,7 @@ EXTRA_OECONF += "${@bb.utils.contains('TUNE_FEATURES', 'mips32r2', '--disable-mi
 EXTRA_OECONF += "${@bb.utils.contains('TUNE_FEATURES', 'mips32r6', '--disable-mips64r2 --disable-mips32r2', '', d)}"
 EXTRA_OECONF:append:mips = " --extra-libs=-latomic --disable-mips32r5 --disable-mipsdsp --disable-mipsdspr2 \
                              --disable-loongson2 --disable-loongson3 --disable-mmi --disable-msa"
-EXTRA_OECONF:append:riscv32 = " --extra-libs=-latomic"
+EXTRA_OECONF:append:riscv32 = " --extra-libs=-latomic --disable-rvv --disable-asm"
 EXTRA_OECONF:append:armv5 = " --extra-libs=-latomic"
 EXTRA_OECONF:append:powerpc = " --extra-libs=-latomic"