net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata

Implement the KSZ87xx short cable workaround.

This patch implements the KSZ87xx short cable erratum
described in Microchip document DS80000687C for KSZ87xx switches
and the following support article:

Link: https://support.microchip.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family
The issue affects short or low-loss cable links (e.g. CAT5e/CAT6),
where the PHY receiver equalizer may amplify high-amplitude signals
excessively, resulting in internal distortion and link establishment
failures.

KSZ87xx devices require a workaround for the Module 3 low-loss cable
condition, controlled through the switch TABLE_LINK_MD_V indirect
registers.

This change models the erratum handling as vendor-specific Clause 22 PHY
registers, virtualized by the KSZ8 DSA driver and accessed via
ksz8_r_phy() / ksz8_w_phy(). The following controls are provided:

- A boolean “short-cable” preset, which applies a documented and
  conservative configuration (LPF 62 MHz bandwidth and DSP EQ initial
  value 0), and is the recommended interface for typical use cases.

- Separate LPF bandwidth and DSP EQ initial value controls intended for
  advanced or experimental tuning. These are orthogonal and independent,
  and override the corresponding settings without requiring any specific
  ordering.

The preset and tunables act as simple setters with no implicit state
machine or invalid combinations, keeping the API predictable and aligned
with the KISS principle.

The erratum affects the shared PHY analog front-end and therefore applies
globally to the switch.

Reviewed-by: Nicolai Buchwitz <nb@tipi-net.de>
Reviewed-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
Link: https://patch.msgid.link/20260609-ksz87xx_errata_low_loss_connections-v10-1-9ba4418cf3db@exotec.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c
index 0f84b2e7d25d832021942e66352f94d34eb4c1a8..4ec2d5d2a1bc0781b556d38cf5d96156fdb584ef 100644 (file)
--- a/drivers/net/dsa/microchip/ksz8.c
+++ b/drivers/net/dsa/microchip/ksz8.c
@@ -798,6 +798,40 @@ static int ksz879x_set_loopback(struct ksz_device *dev, u16 port, u16 val)
                         stat3);
 }
 
+static int ksz87xx_apply_low_loss_preset(struct ksz_device *dev, bool enable)
+{
+       /* Apply the Microchip erratum short-cable preset (LPF 62 MHz, EQ init 0)
+        * providing a conservative configuration for short or low-loss cables.
+        */
+       u8 lpf_bw, eq_init;
+       int ret;
+
+       lpf_bw = KSZ87XX_PHY_LPF_62MHZ;
+       eq_init = KSZ87XX_DSP_EQ_INIT_LOW_LOSS;
+
+       if (!ksz_is_ksz87xx(dev))
+               return -EOPNOTSUPP;
+
+       if (!enable) {
+               /* Restore default values (LPF 90 MHz, EQ init 15). */
+               lpf_bw = KSZ87XX_PHY_LPF_90MHZ;
+               eq_init = KSZ87XX_DSP_EQ_INIT_FACTORY;
+       }
+
+       ret = ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_PHY_LPF, lpf_bw);
+       if (ret)
+               return ret;
+
+       dev->lpf_bw = lpf_bw;
+       ret = ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_DSP_EQ, eq_init);
+       if (ret)
+               return ret;
+
+       dev->eq_init = eq_init;
+
+       return ret;
+}
+
 /**
  * ksz8_r_phy_ctrl - Translates and reads from the SMI interface to a MIIM PHY
  *                  Control register (Reg. 31).
@@ -1046,6 +1080,22 @@ static int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
                if (ret)
                        return ret;
 
+               break;
+       case PHY_REG_KSZ87XX_SHORT_CABLE:
+               if (!ksz_is_ksz87xx(dev))
+                       return -EOPNOTSUPP;
+               data = !!(dev->lpf_bw == KSZ87XX_PHY_LPF_62MHZ &&
+                               dev->eq_init == KSZ87XX_DSP_EQ_INIT_LOW_LOSS);
+               break;
+       case PHY_REG_KSZ87XX_LPF_BW:
+               if (!ksz_is_ksz87xx(dev))
+                       return -EOPNOTSUPP;
+               data = dev->lpf_bw;
+               break;
+       case PHY_REG_KSZ87XX_EQ_INIT:
+               if (!ksz_is_ksz87xx(dev))
+                       return -EOPNOTSUPP;
+               data = dev->eq_init;
                break;
        default:
                processed = false;
@@ -1272,6 +1322,41 @@ static int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
                if (ret)
                        return ret;
                break;
+       case PHY_REG_KSZ87XX_SHORT_CABLE:
+               if (!ksz_is_ksz87xx(dev))
+                       return -EOPNOTSUPP;
+               dev_info_once(dev->dev,
+                             "KSZ87xx low-loss tuning is global, applied switch-wide\n");
+               ret = ksz87xx_apply_low_loss_preset(dev, !!val);
+               if (ret)
+                       return ret;
+               break;
+       case PHY_REG_KSZ87XX_LPF_BW:
+               if (!ksz_is_ksz87xx(dev))
+                       return -EOPNOTSUPP;
+               dev_info_once(dev->dev,
+                             "KSZ87xx low-loss tuning is global, applied switch-wide\n");
+               /* Only accept LPF bandwidth bits [7:6] */
+               if (val & ~KSZ87XX_PHY_LPF_MASK)
+                       return -EINVAL;
+               ret = ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_PHY_LPF, (u8)val);
+               if (ret)
+                       return ret;
+               dev->lpf_bw = val;
+               break;
+       case PHY_REG_KSZ87XX_EQ_INIT:
+               if (!ksz_is_ksz87xx(dev))
+                       return -EOPNOTSUPP;
+               dev_info_once(dev->dev,
+                             "KSZ87xx low-loss tuning is global, applied switch-wide\n");
+               /* Only accept DSP EQ initial value bits [5:0] */
+               if (val & ~KSZ87XX_DSP_EQ_VALID_MASK)
+                       return -EINVAL;
+               ret = ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_DSP_EQ, (u8)val);
+               if (ret)
+                       return ret;
+               dev->eq_init = val;
+               break;
        default:
                break;
        }
@@ -2070,6 +2155,10 @@ static int ksz8_setup(struct dsa_switch *ds)
                        return ret;
        }
 
+       /* Initialize KSZ87xx short-cable preset control */
+       dev->eq_init = KSZ87XX_DSP_EQ_INIT_FACTORY;
+       dev->lpf_bw = KSZ87XX_PHY_LPF_90MHZ;
+
        ret = ksz8_handle_global_errata(ds);
        if (ret)
                return ret;

diff --git a/drivers/net/dsa/microchip/ksz8_reg.h b/drivers/net/dsa/microchip/ksz8_reg.h
index 332408567b473c141c3695328a524f257f2cfc70..981ab441d9b719bb26f1677ad754e6bcb124f26a 100644 (file)
--- a/drivers/net/dsa/microchip/ksz8_reg.h
+++ b/drivers/net/dsa/microchip/ksz8_reg.h
@@ -202,6 +202,10 @@
 #define REG_PORT_3_STATUS_0            0x38
 #define REG_PORT_4_STATUS_0            0x48
 
+/* KSZ87xx LinkMD registers (TABLE_LINK_MD_V) */
+#define KSZ87XX_REG_DSP_EQ                     0x08   /* DSP EQ initial value */
+#define KSZ87XX_REG_PHY_LPF                    0x4C   /* RX LPF bandwidth */
+
 /* For KSZ8765. */
 #define PORT_REMOTE_ASYM_PAUSE         BIT(5)
 #define PORT_REMOTE_SYM_PAUSE          BIT(4)
@@ -342,7 +346,7 @@
 #define TABLE_EEE                      (TABLE_EEE_V << TABLE_EXT_SELECT_S)
 #define TABLE_ACL                      (TABLE_ACL_V << TABLE_EXT_SELECT_S)
 #define TABLE_PME                      (TABLE_PME_V << TABLE_EXT_SELECT_S)
-#define TABLE_LINK_MD                  (TABLE_LINK_MD << TABLE_EXT_SELECT_S)
+#define TABLE_LINK_MD                  (TABLE_LINK_MD_V << TABLE_EXT_SELECT_S)
 #define TABLE_READ                     BIT(4)
 #define TABLE_SELECT_S                 2
 #define TABLE_STATIC_MAC_V             0
@@ -729,6 +733,23 @@
 #define PHY_POWER_SAVING_ENABLE                BIT(2)
 #define PHY_REMOTE_LOOPBACK            BIT(1)
 
+/* Vendor-specific Clause 22 PHY registers (virtualized) */
+#define PHY_REG_KSZ87XX_SHORT_CABLE            0x1A
+#define PHY_REG_KSZ87XX_LPF_BW                 0x1B
+#define PHY_REG_KSZ87XX_EQ_INIT                        0x1C
+
+/* LPF bandwidth bits [7:6]: 00 = 90MHz (default), 01 = 62MHz, 10 = 55MHz, 11 = 44MHz  */
+#define KSZ87XX_PHY_LPF_MASK     GENMASK(7, 6)
+#define KSZ87XX_PHY_LPF_90MHZ    FIELD_PREP(KSZ87XX_PHY_LPF_MASK, 0)
+#define KSZ87XX_PHY_LPF_62MHZ    FIELD_PREP(KSZ87XX_PHY_LPF_MASK, 1)
+#define KSZ87XX_PHY_LPF_55MHZ    FIELD_PREP(KSZ87XX_PHY_LPF_MASK, 2)
+#define KSZ87XX_PHY_LPF_44MHZ    FIELD_PREP(KSZ87XX_PHY_LPF_MASK, 3)
+
+/* Low-loss workaround DSP EQ INIT VALUE */
+#define KSZ87XX_DSP_EQ_VALID_MASK              GENMASK(5, 0)
+#define KSZ87XX_DSP_EQ_INIT_LOW_LOSS   0x00
+#define KSZ87XX_DSP_EQ_INIT_FACTORY            0x0F
+
 /* KSZ8463 specific registers. */
 #define P1MBCR                         0x4C
 #define P1MBSR                         0x4E

diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h
index b67038cf1bd09084cf229f63139d487db7a235bd..45613b9aeb1e780fe7b234e7991be2e0863add9a 100644 (file)
--- a/drivers/net/dsa/microchip/ksz_common.h
+++ b/drivers/net/dsa/microchip/ksz_common.h
@@ -222,6 +222,10 @@ struct ksz_device {
         * the switch’s internal PHYs, bypassing the main SPI interface.
         */
        struct mii_bus *parent_mdio_bus;
+
+       /* KSZ87xx low-loss tuning state */
+       u8 lpf_bw;              /* KSZ87XX_PHY_LPF_* */
+       u8 eq_init;             /* DSP EQ initial value */
 };
 
 /* List of supported models */