]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: zena: Move SRAM into SoC and memory node out of SoC
authorDebbie Horsfall <debbie.horsfall@arm.com>
Wed, 11 Mar 2026 17:39:48 +0000 (17:39 +0000)
committerSudeep Holla <sudeep.holla@kernel.org>
Thu, 12 Mar 2026 15:13:44 +0000 (15:13 +0000)
Move the SRAM node into the SoC node. Move the memory node out of
the include to make it customizable for each platform variant.

Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com>
Message-Id: <20260311173948.3478931-1-debbie.horsfall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
arch/arm64/boot/dts/arm/zena-css-fvp.dts
arch/arm64/boot/dts/arm/zena-css.dtsi

index b75204a91882a411bc99fcd8ed192e5764e7e698..53c5412d92b21cd86d4c11c6d01076d1594c9859 100644 (file)
        chosen {
                stdout-path = &soc_serial0;
        };
+
+       memory@80000000 {
+               device_type = "memory";
+
+               /* ~2GB mapped at 2GB, another 2GB at 2TB */
+               reg = <0x00000000 0x80000000 0x00000000 0x7f000000>,
+                     <0x00000200 0x00000000 0x00000000 0x80000000>;
+       };
 };
 
 &soc {
index 9899d28833374472fb860235ed6aef55af80daba..0b41ee4bf4c6eda6035c8e935ce5a175e66128d9 100644 (file)
                #size-cells = <2>;
                ranges;
 
+               sram: sram@104000 {
+                       compatible = "mmio-sram";
+                       reg = <0x0 0x00104000 0x0 0x00001000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x0 0x00104000 0x00001000>;
+
+                       scmi_shmem_tx: scpshmem-sram-section@0 {
+                               compatible = "arm,scmi-shmem";
+                               reg = <0x0 0x100>;
+                       };
+
+                       scmi_shmem_rx: scpshmem-sram-section@100 {
+                               compatible = "arm,scmi-shmem";
+                               reg = <0x100 0x100>;
+                       };
+               };
+
                timer@1a810000 {
                        compatible = "arm,armv7-timer-mem";
                        reg = <0x0 0x1a810000 0x0 0x10000>;
                             <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
                             <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
        };
-
-       sram: sram@104000 {
-               compatible = "mmio-sram";
-               reg = <0x0 0x00104000 0x0 0x00001000>;
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges = <0 0x0 0x00104000 0x00001000>;
-
-               scmi_shmem_tx: scpshmem-sram-section@0 {
-                       compatible = "arm,scmi-shmem";
-                       reg = <0x0 0x100>;
-               };
-
-               scmi_shmem_rx: scpshmem-sram-section@100 {
-                       compatible = "arm,scmi-shmem";
-                       reg = <0x100 0x100>;
-               };
-       };
-
-       memory@80000000 {
-               device_type = "memory";
-
-               /* ~2GB mapped at 2GB, another 2GB at 2TB */
-               reg = <0x00000000 0x80000000 0x00000000 0x7f000000>,
-                     <0x00000200 0x00000000 0x00000000 0x80000000>;
-       };
 };