Common header file change not applicable to open-vm-tools.

diff --git a/open-vm-tools/lib/include/vm_basic_asm_x86_64.h b/open-vm-tools/lib/include/vm_basic_asm_x86_64.h
index 21ec721acc777cc3f507385c1273bbcd6d828051..c8ce8dfcf1083b14cbe65c48f99d1bfc63a37430 100644 (file)
--- a/open-vm-tools/lib/include/vm_basic_asm_x86_64.h
+++ b/open-vm-tools/lib/include/vm_basic_asm_x86_64.h
@@ -1,5 +1,5 @@
 /*********************************************************
- * Copyright (C) 1998-2020 VMware, Inc. All rights reserved.
+ * Copyright (C) 1998-2021 VMware, Inc. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU Lesser General Public License as published
@@ -302,6 +302,37 @@ XRSTOR_AMD_ES0(const void *load, uint64 mask)
         : "eax", "memory");
 }
 
+#endif /* __GNUC__ */
+
+/*
+ * XSAVES/XRSTORS
+ *     saves/restores processor state components
+ *
+ * The pointer passed in must be 64-byte aligned.
+ */
+
+#if defined(__GNUC__)
+static INLINE void
+XSAVES(const void *save, uint64 mask)
+{
+   __asm__ __volatile__ (
+        "xsaves %0 \n"
+        : "=m" (*(uint8 *)save)
+        : "a" ((uint32)mask), "d" ((uint32)(mask >> 32))
+        : "memory");
+}
+
+static INLINE void
+XRSTORS(const void *load, uint64 mask)
+{
+   __asm__ __volatile__ (
+        "xrstors %0 \n"
+        :
+        : "m" (*(const uint8 *)load),
+          "a" ((uint32)mask), "d" ((uint32)(mask >> 32))
+        : "memory");
+}
+
 #endif /* __GNUC__ */
 #endif /* VMM || VMKERNEL || FROBOS || ULM */
 

diff --git a/open-vm-tools/lib/include/x86cpuid.h b/open-vm-tools/lib/include/x86cpuid.h
index 499075ada8b14e59b501eb51ed8cedf29becb718..4a6d0cf77d0c7c2fa4793725d42f844a0cfafcbd 100644 (file)
--- a/open-vm-tools/lib/include/x86cpuid.h
+++ b/open-vm-tools/lib/include/x86cpuid.h
@@ -572,7 +572,7 @@ FLAG(   7,  0, EDX, 14,  1, SERIALIZE,                           YES,  20 ) \
 FLAG(   7,  0, EDX, 15,  1, HYBRID,                              NO,    0 ) \
 FLAG(   7,  0, EDX, 16,  1, TSXLDTRK,                            NO,    0 ) \
 FLAG(   7,  0, EDX, 18,  1, PCONFIG,                             NO,    0 ) \
-FLAG(   7,  0, EDX, 19,  1, ARCH_LBR,                            NO,    0 ) \
+FLAG(   7,  0, EDX, 19,  1, ARCH_LBR,                            YES,  20 ) \
 FLAG(   7,  0, EDX, 20,  1, CET_IBT,                             NO,    0 ) \
 FLAG(   7,  0, EDX, 22,  1, AMX_BF16,                            NO,    0 ) \
 FLAG(   7,  0, EDX, 23,  1, AVX512FP16,                          NO,    0 ) \
@@ -874,15 +874,15 @@ FIELD( 1B,  0, EDX,  0, 32, PCONFIG_TARGET_ID3,                  NO,    0 )
 
 /*    LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME,               MON SUPP, HWV  */
 #define CPUID_FIELD_DATA_LEVEL_1C                                           \
-FIELD( 1C,  0, EAX,  0,  8, LBR_DEPTH,                           NO,    0 ) \
-FLAG(  1C,  0, EAX, 30,  1, LBR_DEEP_CSTATE_RESET,               NO,    0 ) \
-FLAG(  1C,  0, EAX, 31,  1, LBR_IP_CONTAINS_LIP,                 NO,    0 ) \
-FLAG(  1C,  0, EBX,  0,  1, LBR_CPL_FILTERING,                   NO,    0 ) \
-FLAG(  1C,  0, EBX,  1,  1, LBR_BRANCH_FILTERING,                NO,    0 ) \
-FLAG(  1C,  0, EBX,  2,  1, LBR_CALL_STACK_MODE,                 NO,    0 ) \
-FLAG(  1C,  0, ECX,  0,  1, LBR_MISPREDICT,                      NO,    0 ) \
-FLAG(  1C,  0, ECX,  1,  1, LBR_TIMED_LBRS,                      NO,    0 ) \
-FLAG(  1C,  0, ECX,  2,  1, LBR_BRANCH_TYPE,                     NO,    0 ) \
+FIELD( 1C,  0, EAX,  0,  8, LBR_DEPTH,                           YES,  20 ) \
+FLAG(  1C,  0, EAX, 30,  1, LBR_DEEP_CSTATE_RESET,               YES,  20 ) \
+FLAG(  1C,  0, EAX, 31,  1, LBR_IP_CONTAINS_LIP,                 YES,  20 ) \
+FLAG(  1C,  0, EBX,  0,  1, LBR_CPL_FILTERING,                   YES,  20 ) \
+FLAG(  1C,  0, EBX,  1,  1, LBR_BRANCH_FILTERING,                YES,  20 ) \
+FLAG(  1C,  0, EBX,  2,  1, LBR_CALL_STACK_MODE,                 YES,  20 ) \
+FLAG(  1C,  0, ECX,  0,  1, LBR_MISPREDICT,                      YES,  20 ) \
+FLAG(  1C,  0, ECX,  1,  1, LBR_TIMED_LBRS,                      YES,  20 ) \
+FLAG(  1C,  0, ECX,  2,  1, LBR_BRANCH_TYPE,                     YES,  20 ) \
 
 /*    LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME,               MON SUPP, HWV  */
 #define CPUID_FIELD_DATA_LEVEL_1D                                           \