Update the query_esw_functions command to support a new response layout
that can report data for multiple network functions. Setting bit 14 of
the op_mod field selects the v1 layout with network_function_params
entries instead of the legacy host_params_context.
The query_host_net_function_v1 read-only capability indicates firmware
support for layout version 1, and query_host_net_function_num_max
advertises the maximum number of network function entries.
Define a new network_function_params layout and a net_function_params
union that groups host_params_context and network_function_params.
Rework the query_esw_functions output to use a flexible array of this
union, and adjust existing driver callers to use it.
Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260428053851.220089-5-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
static int mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch *esw)
{
const u32 *query_host_out;
+ void *host_params;
if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
return 0;
if (IS_ERR(query_host_out))
return PTR_ERR(query_host_out);
+ host_params = MLX5_ADDR_OF(query_esw_functions_out,
+ query_host_out, net_function_params);
esw->esw_funcs.host_funcs_disabled =
- MLX5_GET(query_esw_functions_out, query_host_out,
- host_params_context.host_pf_not_exist);
+ MLX5_GET(host_params_context, host_params,
+ host_pf_not_exist);
kvfree(query_host_out);
return 0;
static void
mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, int num_vfs)
{
+ void *host_params;
const u32 *out;
if (num_vfs < 0)
if (IS_ERR(out))
return;
- esw->esw_funcs.num_vfs = MLX5_GET(query_esw_functions_out, out,
- host_params_context.host_num_of_vfs);
+ host_params = MLX5_ADDR_OF(query_esw_functions_out, out,
+ net_function_params);
+ esw->esw_funcs.num_vfs = MLX5_GET(host_params_context, host_params,
+ host_num_of_vfs);
if (mlx5_core_ec_sriov_enabled(esw->dev))
esw->esw_funcs.num_ec_vfs = num_vfs;
{
struct devlink *devlink;
bool host_pf_disabled;
+ void *host_params;
u16 new_num_vfs;
devlink = priv_to_devlink(esw->dev);
if (work_gen != atomic_read(&esw->esw_funcs.generation))
goto unlock;
- new_num_vfs = MLX5_GET(query_esw_functions_out, out,
- host_params_context.host_num_of_vfs);
- host_pf_disabled = MLX5_GET(query_esw_functions_out, out,
- host_params_context.host_pf_disabled);
+ host_params = MLX5_ADDR_OF(query_esw_functions_out, out,
+ net_function_params);
+ new_num_vfs = MLX5_GET(host_params_context, host_params,
+ host_num_of_vfs);
+ host_pf_disabled = MLX5_GET(host_params_context, host_params,
+ host_pf_disabled);
if (new_num_vfs == esw->esw_funcs.num_vfs || host_pf_disabled)
goto unlock;
static int mlx5_esw_host_number_init(struct mlx5_eswitch *esw)
{
const u32 *query_host_out;
+ void *host_params;
if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
return 0;
return PTR_ERR(query_host_out);
/* Mark non local controller with non zero controller number. */
- esw->offloads.host_number = MLX5_GET(query_esw_functions_out, query_host_out,
- host_params_context.host_number);
+ host_params = MLX5_ADDR_OF(query_esw_functions_out,
+ query_host_out, net_function_params);
+ esw->offloads.host_number = MLX5_GET(host_params_context,
+ host_params, host_number);
kvfree(query_host_out);
return 0;
}
{
struct mlx5_vport *vport = mlx5_devlink_port_vport_get(port);
const u32 *query_out;
+ void *host_params;
bool pf_disabled;
if (vport->vport != MLX5_VPORT_HOST_PF) {
if (IS_ERR(query_out))
return PTR_ERR(query_out);
- pf_disabled = MLX5_GET(query_esw_functions_out, query_out,
- host_params_context.host_pf_disabled);
+ host_params = MLX5_ADDR_OF(query_esw_functions_out, query_out,
+ net_function_params);
+ pf_disabled = MLX5_GET(host_params_context, host_params,
+ host_pf_disabled);
*opstate = pf_disabled ? DEVLINK_PORT_FN_OPSTATE_DETACHED :
DEVLINK_PORT_FN_OPSTATE_ATTACHED;
#ifndef __MLX5_IFC_VHCA_EVENT_H__
#define __MLX5_IFC_VHCA_EVENT_H__
-enum mlx5_ifc_vhca_state {
- MLX5_VHCA_STATE_INVALID = 0x0,
- MLX5_VHCA_STATE_ALLOCATED = 0x1,
- MLX5_VHCA_STATE_ACTIVE = 0x2,
- MLX5_VHCA_STATE_IN_USE = 0x3,
- MLX5_VHCA_STATE_TEARDOWN_REQUEST = 0x4,
-};
-
struct mlx5_ifc_vhca_state_context_bits {
u8 arm_change_event[0x1];
u8 reserved_at_1[0xb];
static u16 mlx5_get_max_vfs(struct mlx5_core_dev *dev)
{
u16 host_total_vfs;
+ void *host_params;
const u32 *out;
if (mlx5_core_is_ecpf_esw_manager(dev)) {
*/
if (IS_ERR(out))
goto done;
- host_total_vfs = MLX5_GET(query_esw_functions_out, out,
- host_params_context.host_total_vfs);
+ host_params = MLX5_ADDR_OF(query_esw_functions_out, out,
+ net_function_params);
+ host_total_vfs = MLX5_GET(host_params_context, host_params,
+ host_total_vfs);
kvfree(out);
return host_total_vfs;
}
u8 max_flow_counter_31_16[0x10];
u8 max_wqe_sz_sq_dc[0x10];
- u8 reserved_at_2e0[0x7];
+ u8 query_host_net_function_num_max[0x5];
+ u8 reserved_at_2e5[0x2];
u8 max_qp_mcg[0x19];
u8 reserved_at_300[0x10];
u8 log_max_current_mc_list[0x5];
u8 reserved_at_3f8[0x1];
u8 silent_mode_query[0x1];
- u8 reserved_at_3fa[0x1];
+ u8 query_host_net_function_v1[0x1];
u8 log_max_current_uc_list[0x5];
u8 general_obj_types[0x40];
u8 reserved_at_80[0x180];
};
+enum mlx5_ifc_vhca_state {
+ MLX5_VHCA_STATE_INVALID = 0x0,
+ MLX5_VHCA_STATE_ALLOCATED = 0x1,
+ MLX5_VHCA_STATE_ACTIVE = 0x2,
+ MLX5_VHCA_STATE_IN_USE = 0x3,
+ MLX5_VHCA_STATE_TEARDOWN_REQUEST = 0x4,
+};
+
+enum {
+ MLX5_PCI_PF_TYPE_EXTERNAL_HOST_PF = 0x0,
+ MLX5_PCI_PF_TYPE_SATELLITE_PF = 0x1,
+};
+
+struct mlx5_ifc_network_function_params_bits {
+ u8 host_number[0x8];
+ u8 pci_pf_type[0x4];
+ u8 reserved_at_c[0x4];
+ u8 pci_num_vfs[0x10];
+
+ u8 pci_total_vfs[0x10];
+ u8 pci_bus[0x8];
+ u8 pci_device_function[0x8];
+
+ u8 vhca_id[0x10];
+ u8 vhca_state[0x4];
+ u8 reserved_at_54[0xc];
+
+ u8 reserved_at_60[0xa];
+ u8 esw_vport_manual[0x1];
+ u8 pci_bus_assigned[0x1];
+ u8 pci_vf_info_valid[0x1];
+ u8 reserved_at_6d[0x13];
+
+ u8 pci_vf_stride[0x10];
+ u8 pci_first_vf_offset[0x10];
+
+ u8 reserved_at_a0[0x160];
+};
+
+union mlx5_ifc_net_function_params_bits {
+ struct mlx5_ifc_host_params_context_bits host_params_context;
+ struct mlx5_ifc_network_function_params_bits network_function_params;
+};
+
+enum {
+ MLX5_QUERY_ESW_FUNC_OP_MOD_LAYOUT_V1 = BIT(14),
+};
+
struct mlx5_ifc_query_esw_functions_in_bits {
u8 opcode[0x10];
u8 reserved_at_10[0x10];
u8 syndrome[0x20];
- u8 reserved_at_40[0x40];
+ u8 reserved_at_40[0x20];
- struct mlx5_ifc_host_params_context_bits host_params_context;
+ u8 net_function_num[0x8];
+ u8 reserved_at_68[0x18];
- u8 reserved_at_280[0x180];
+ union {
+ u8 reserved_at_80[0x380];
+ DECLARE_FLEX_ARRAY(union mlx5_ifc_net_function_params_bits,
+ net_function_params);
+ };
};
struct mlx5_ifc_sf_partition_bits {