]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: amlogic: axg: switch to the new PWM controller binding
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Fri, 27 Dec 2024 21:25:13 +0000 (22:25 +0100)
committerNeil Armstrong <neil.armstrong@linaro.org>
Fri, 28 Feb 2025 08:16:50 +0000 (09:16 +0100)
Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241227212514.1376682-5-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm64/boot/dts/amlogic/meson-axg.dtsi

index e9b22868983db5d5415c3c3e485d33a95820b915..a6924d246bb1e1721a1a9a3a8285f98c003c2640 100644 (file)
                        };
 
                        pwm_AO_cd: pwm@2000 {
-                               compatible = "amlogic,meson-axg-ao-pwm";
+                               compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x02000  0x0 0x20>;
+                               clocks = <&xtal>,
+                                        <&clkc_AO CLKID_AO_CLK81>,
+                                        <&clkc CLKID_FCLK_DIV4>,
+                                        <&clkc CLKID_FCLK_DIV5>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };
                        };
 
                        pwm_AO_ab: pwm@7000 {
-                               compatible = "amlogic,meson-axg-ao-pwm";
+                               compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x07000 0x0 0x20>;
+                               clocks = <&xtal>,
+                                        <&clkc_AO CLKID_AO_CLK81>,
+                                        <&clkc CLKID_FCLK_DIV4>,
+                                        <&clkc CLKID_FCLK_DIV5>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };
                        };
 
                        pwm_ab: pwm@1b000 {
-                               compatible = "amlogic,meson-axg-ee-pwm";
+                               compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x1b000 0x0 0x20>;
+                               clocks = <&xtal>,
+                                        <&clkc CLKID_FCLK_DIV5>,
+                                        <&clkc CLKID_FCLK_DIV4>,
+                                        <&clkc CLKID_FCLK_DIV3>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };
 
                        pwm_cd: pwm@1a000 {
-                               compatible = "amlogic,meson-axg-ee-pwm";
+                               compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x1a000 0x0 0x20>;
+                               clocks = <&xtal>,
+                                        <&clkc CLKID_FCLK_DIV5>,
+                                        <&clkc CLKID_FCLK_DIV4>,
+                                        <&clkc CLKID_FCLK_DIV3>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };