Calculate next %rip correctly in palignr instructions (mmx and xmm-class).

Fixes #186238.

MERGE TO 3_4_BRANCH.

git-svn-id: svn://svn.valgrind.org/vex/trunk@1887

diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c
index 90b57bbac12650c04d81813d4a3c87cc4dd05f98..bf10872b44be69804fa36759bbaa779497929cf7 100644 (file)
--- a/VEX/priv/guest-amd64/toIR.c
+++ b/VEX/priv/guest-amd64/toIR.c
@@ -13259,7 +13259,7 @@ DisResult disInstr_AMD64_WRK (
                                      nameMMXReg(eregLO3ofRM(modrm)),
                                      nameMMXReg(gregLO3ofRM(modrm)));
       } else {
-         addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
+         addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 1 );
          assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
          d64 = (Long)insn[3+alen];
          delta += 3+alen+1;
@@ -13318,7 +13318,7 @@ DisResult disInstr_AMD64_WRK (
                                     nameXMMReg(eregOfRexRM(pfx,modrm)),
                                     nameXMMReg(gregOfRexRM(pfx,modrm)));
       } else {
-         addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
+         addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 1 );
          gen_SEGV_if_not_16_aligned( addr );
          assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
          d64 = (Long)insn[3+alen];