[committed][PR target/104987] Avoid "likely" forms of bbi[n] on iq2000.

The iq2000 port is mis-compiling its mulsi3 libgcc2 function.

AFAICT, the iq2000 has delay slots and can use "branch-likely" forms of conditional branches to annul-false the slot.   There's a support routine that handles creation of the  likely form.  However, that routine is not used by the bbi[n] instructions.

If I manually add the likely extension to the bbi[b] instructions, the assembler complains  After a fair amount of digging it appears that the likely forms of bbi[n] are only supported on the IQ10 variant.

Given this is a dead processor and has been so for a while it seems reasonable to just disallow annul-false slots for the bbi[n] instructions rather than try to handle them just for the IQ10 (which we don't have real support for anyway).

This (of course) fixes the vrp13 regression.  But it also fixes nearly a thousand execution test failures in the testsuite (Yow!).

gcc/
	PR target/104987
	* config/iq2000/iq2000.md (bbi): New attribute,  default to no.
	(delay slot descripts): Use different delay slot description when
	the insn as the "bbi" attribute.
	(bbi, bbin patterns): Set the bbi attribute to yes.

diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md
index fdb346f43ef50891bd91e85c93b41dd1a1b59f74..86361e27a86f84a80f44a3321dea189ab4948bde 100644 (file)
--- a/gcc/config/iq2000/iq2000.md
+++ b/gcc/config/iq2000/iq2000.md
@@ -165,6 +165,8 @@
                 (const_string "yes")
                 (const_string "no"))))
 
+;; Is this a bbi instruction or not
+(define_attr "bbi" "no,yes" (const_string "no"))
 
 ;; Describe a user's asm statement.
 (define_asm_attributes
@@ -183,11 +185,18 @@
    (nil)
    (nil)])
 
-(define_delay (eq_attr "type" "branch")
+;; GAS refuses to assemble bbi[n]l.  So for bbi instructions, do not
+;; allow them to annul-false.
+(define_delay (and (eq_attr "type" "branch") (eq_attr "bbi" "no"))
   [(and (eq_attr "dslot" "ok_in_dslot") (eq_attr "length" "4"))
    (nil)
    (and (eq_attr "branch_likely" "yes") (and (eq_attr "dslot" "ok_in_dslot") (eq_attr "length" "4")))])
 
+(define_delay (and (eq_attr "type" "branch") (eq_attr "bbi" "yes"))
+  [(and (eq_attr "dslot" "ok_in_dslot") (eq_attr "length" "4"))
+   (nil)
+   (nil)])
+
 (define_delay (eq_attr "type" "call")
   [(and (eq_attr "dslot" "ok_in_dslot") (eq_attr "length" "4"))
    (nil)
@@ -1114,7 +1123,8 @@
   ""
   "bb%A2\\t%0(31-%1),%P2%P3"
   [(set_attr "length" "4")
-   (set_attr "type" "branch")])
+   (set_attr "type" "branch")
+   (set_attr "bbi" "yes")])
 
 (define_insn ""
   [(set (pc)
@@ -1128,7 +1138,8 @@
   ""
   "bb%A3\\t%0(31-%1),%P2%P3"
   [(set_attr "length" "4")
-   (set_attr "type" "branch")])
+   (set_attr "type" "branch")
+   (set_attr "bbi" "yes")])
 
 (define_insn ""
   [(set (pc)
@@ -1142,7 +1153,8 @@
   "0"
   "bb%A2\\t%0(31-%1),%P2%P3"
   [(set_attr "length" "4")
-   (set_attr "type" "branch")])
+   (set_attr "type" "branch")
+   (set_attr "bbi" "yes")])
 
 (define_insn ""
   [(set (pc)
@@ -1156,7 +1168,8 @@
   "0"
   "bb%A3\\t%0(31-%1),%P2%P3"
   [(set_attr "length" "4")
-   (set_attr "type" "branch")])
+   (set_attr "type" "branch")
+   (set_attr "bbi" "yes")])
 
 (define_insn ""
   [(set (pc)
@@ -1169,7 +1182,8 @@
   ""
   "bb%A3\\t%0(%p1),%P2%P3"
   [(set_attr "length" "4")
-   (set_attr "type" "branch")])
+   (set_attr "type" "branch")
+   (set_attr "bbi" "yes")])
 
 (define_insn ""
   [(set (pc)
@@ -1182,7 +1196,8 @@
   ""
   "bb%A2\\t%0(%p1),%P2%P3"
   [(set_attr "length" "4")
-   (set_attr "type" "branch")])
+   (set_attr "type" "branch")
+   (set_attr "bbi" "yes")])
 \f
 ;;
 ;;  ....................