drm/amd/pm: Use common helper for smuv14.0.2 dpm

Use helper function to print smuv14.0.2 dpm tables to sysfs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 596cdba0a8b464e927fe6bc7a51664c7ae5c7d42..af1bc7b4350b4d8a6681f896126f32ea6cc21a89 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -1045,7 +1045,7 @@ static int smu_v14_0_2_emit_clk_levels(struct smu_context *smu,
        struct smu_14_0_dpm_context *dpm_context = smu_dpm->dpm_context;
        OverDriveTableExternal_t *od_table =
                (OverDriveTableExternal_t *)smu->smu_table.overdrive_table;
-       struct smu_dpm_table *single_dpm_table;
+       struct smu_dpm_table *single_dpm_table = NULL;
        struct smu_pcie_table *pcie_table;
        uint32_t gen_speed, lane_width;
        int i, curr_freq, size = *offset, start_offset = *offset;
@@ -1081,61 +1081,6 @@ static int smu_v14_0_2_emit_clk_levels(struct smu_context *smu,
        case SMU_DCEFCLK:
                single_dpm_table = &(dpm_context->dpm_tables.dcef_table);
                break;
-       default:
-               break;
-       }
-
-       switch (clk_type) {
-       case SMU_SCLK:
-       case SMU_MCLK:
-       case SMU_SOCCLK:
-       case SMU_FCLK:
-       case SMU_VCLK:
-       case SMU_VCLK1:
-       case SMU_DCLK:
-       case SMU_DCLK1:
-       case SMU_DCEFCLK:
-               ret = smu_v14_0_2_get_current_clk_freq_by_table(smu, clk_type, &curr_freq);
-               if (ret) {
-                       dev_err(smu->adev->dev, "Failed to get current clock freq!");
-                       return ret;
-               }
-
-               if (single_dpm_table->flags & SMU_DPM_TABLE_FINE_GRAINED) {
-                       /*
-                        * For fine grained dpms, there are only two dpm levels:
-                        *   - level 0 -> min clock freq
-                        *   - level 1 -> max clock freq
-                        * And the current clock frequency can be any value between them.
-                        * So, if the current clock frequency is not at level 0 or level 1,
-                        * we will fake it as three dpm levels:
-                        *   - level 0 -> min clock freq
-                        *   - level 1 -> current actual clock freq
-                        *   - level 2 -> max clock freq
-                        */
-                       if ((single_dpm_table->dpm_levels[0].value != curr_freq) &&
-                            (single_dpm_table->dpm_levels[1].value != curr_freq)) {
-                               size += sysfs_emit_at(buf, size, "0: %uMhz\n",
-                                               single_dpm_table->dpm_levels[0].value);
-                               size += sysfs_emit_at(buf, size, "1: %uMhz *\n",
-                                               curr_freq);
-                               size += sysfs_emit_at(buf, size, "2: %uMhz\n",
-                                               single_dpm_table->dpm_levels[1].value);
-                       } else {
-                               size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
-                                               single_dpm_table->dpm_levels[0].value,
-                                               single_dpm_table->dpm_levels[0].value == curr_freq ? "*" : "");
-                               size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",
-                                               single_dpm_table->dpm_levels[1].value,
-                                               single_dpm_table->dpm_levels[1].value == curr_freq ? "*" : "");
-                       }
-               } else {
-                       for (i = 0; i < single_dpm_table->count; i++)
-                               size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
-                                               i, single_dpm_table->dpm_levels[i].value,
-                                               single_dpm_table->dpm_levels[i].value == curr_freq ? "*" : "");
-               }
-               break;
        case SMU_PCIE:
                ret = smu_v14_0_2_get_smu_metrics_data(smu,
                                                       METRICS_PCIE_RATE,
@@ -1150,25 +1095,8 @@ static int smu_v14_0_2_emit_clk_levels(struct smu_context *smu,
                        return ret;
 
                pcie_table = &(dpm_context->dpm_tables.pcie_table);
-               for (i = 0; i < pcie_table->lclk_levels; i++)
-                       size += sysfs_emit_at(buf, size, "%d: %s %s %dMhz %s\n", i,
-                                       (pcie_table->pcie_gen[i] == 0) ? "2.5GT/s," :
-                                       (pcie_table->pcie_gen[i] == 1) ? "5.0GT/s," :
-                                       (pcie_table->pcie_gen[i] == 2) ? "8.0GT/s," :
-                                       (pcie_table->pcie_gen[i] == 3) ? "16.0GT/s," :
-                                       (pcie_table->pcie_gen[i] == 4) ? "32.0GT/s," : "",
-                                       (pcie_table->pcie_lane[i] == 1) ? "x1" :
-                                       (pcie_table->pcie_lane[i] == 2) ? "x2" :
-                                       (pcie_table->pcie_lane[i] == 3) ? "x4" :
-                                       (pcie_table->pcie_lane[i] == 4) ? "x8" :
-                                       (pcie_table->pcie_lane[i] == 5) ? "x12" :
-                                       (pcie_table->pcie_lane[i] == 6) ? "x16" :
-                                       (pcie_table->pcie_lane[i] == 7) ? "x32" : "",
-                                       pcie_table->lclk_freq[i],
-                                       (gen_speed == DECODE_GEN_SPEED(pcie_table->pcie_gen[i])) &&
-                                       (lane_width == DECODE_LANE_WIDTH(pcie_table->pcie_lane[i])) ?
-                                       "*" : "");
-               break;
+               return smu_cmn_print_pcie_levels(smu, pcie_table, gen_speed,
+                                                lane_width, buf, offset);
 
        case SMU_OD_SCLK:
                if (!smu_v14_0_2_is_od_feature_supported(smu,
@@ -1364,6 +1292,18 @@ static int smu_v14_0_2_emit_clk_levels(struct smu_context *smu,
                break;
        }
 
+       if (single_dpm_table) {
+               ret = smu_v14_0_2_get_current_clk_freq_by_table(smu, clk_type,
+                                                               &curr_freq);
+               if (ret) {
+                       dev_err(smu->adev->dev,
+                               "Failed to get current clock freq!");
+                       return ret;
+               }
+               return smu_cmn_print_dpm_clk_levels(smu, single_dpm_table,
+                                                   curr_freq, buf, offset);
+       }
+
        *offset += size - start_offset;
 
        return 0;